/* this file is automatic generate . Please do not edit it
       ./genpintab.awk gpio_pinmux.csv > <this file name> can generate this file*/
#define AOBUS_REG_ADDR_MASK(a)   AOBUS_REG_ADDR(((a)&0xffff))
#define REG (0x202c)
#define AO_REG (0x14)
#define P_GPIO_OEN_0 CBUS_REG_ADDR(0x200c)
#define P_GPIO_OEN_1 CBUS_REG_ADDR(0x200f)
#define P_GPIO_OEN_2 CBUS_REG_ADDR(0x2012)
#define P_GPIO_OEN_3 CBUS_REG_ADDR(0x2015)
#define P_GPIO_OEN_4 CBUS_REG_ADDR(0x2018)
#define P_GPIO_OEN_5 CBUS_REG_ADDR(0x201b)
#define P_GPIO_OUT_0 CBUS_REG_ADDR(0x200d)
#define P_GPIO_OUT_1 CBUS_REG_ADDR(0x2010)
#define P_GPIO_OUT_2 CBUS_REG_ADDR(0x2013)
#define P_GPIO_OUT_3 CBUS_REG_ADDR(0x2016)
#define P_GPIO_OUT_4 CBUS_REG_ADDR(0x2019)
#define P_GPIO_OUT_5 CBUS_REG_ADDR(0x201c)
#define P_GPIO_IN_0 CBUS_REG_ADDR(0x200e)
#define P_GPIO_IN_1 CBUS_REG_ADDR(0x2011)
#define P_GPIO_IN_2 CBUS_REG_ADDR(0x2014)
#define P_GPIO_IN_3 CBUS_REG_ADDR(0x2017)
#define P_GPIO_IN_4 CBUS_REG_ADDR(0x201a)
#define P_GPIO_IN_5 CBUS_REG_ADDR(0x201d)
#define P_GPIO_OEN_6 CBUS_REG_ADDR(0x2008)
#define P_GPIO_OUT_6 CBUS_REG_ADDR(0x2009)
#define P_GPIO_IN_6 CBUS_REG_ADDR(0x200a)
#define P_GPIO_OEN_AO AOBUS_REG_ADDR_MASK(0xc8100024)
#define P_GPIO_OUT_AO AOBUS_REG_ADDR_MASK(0xc8100026)
#define P_GPIO_IN_AO AOBUS_REG_ADDR_MASK(0xc8100028)
#define REG0 (REG+0)
#define P_PIN_MUX_REG_0 CBUS_REG_ADDR(REG0)
#define REG1 (REG+1)
#define P_PIN_MUX_REG_1 CBUS_REG_ADDR(REG1)
#define REG2 (REG+2)
#define P_PIN_MUX_REG_2 CBUS_REG_ADDR(REG2)
#define REG3 (REG+3)
#define P_PIN_MUX_REG_3 CBUS_REG_ADDR(REG3)
#define REG4 (REG+4)
#define P_PIN_MUX_REG_4 CBUS_REG_ADDR(REG4)
#define REG5 (REG+5)
#define P_PIN_MUX_REG_5 CBUS_REG_ADDR(REG5)
#define REG6 (REG+6)
#define P_PIN_MUX_REG_6 CBUS_REG_ADDR(REG6)
#define REG7 (REG+7)
#define P_PIN_MUX_REG_7 CBUS_REG_ADDR(REG7)
#define REG8 (REG+8)
#define P_PIN_MUX_REG_8 CBUS_REG_ADDR(REG8)
#define REG9 (REG+9)
#define P_PIN_MUX_REG_9 CBUS_REG_ADDR(REG9)
#define P_PIN_MUX_REG_AO AOBUS_REG_ADDR(AO_REG)
#define P_PIN_MUX_REG(base,bit) (bit+(base<<5))
#define P_PIN_MUX_REG_NUM (sizeof(p_pin_mux_reg_addr)/sizeof(p_pin_mux_reg_addr[0]))
static unsigned p_pin_mux_reg_addr[]={
	P_PIN_MUX_REG_0,
	P_PIN_MUX_REG_1,
	P_PIN_MUX_REG_2,
	P_PIN_MUX_REG_3,
	P_PIN_MUX_REG_4,
	P_PIN_MUX_REG_5,
	P_PIN_MUX_REG_6,
	P_PIN_MUX_REG_7,
	P_PIN_MUX_REG_8,
	P_PIN_MUX_REG_9,
	P_PIN_MUX_REG_AO,
};
#define P_GPIO_IN(base,bit) (bit+(base<<5))
#define P_GPIO_IN_NUM (sizeof(p_gpio_in_addr)/sizeof(p_gpio_in_addr[0]))
static unsigned p_gpio_in_addr[]={
	P_GPIO_IN_0,
	P_GPIO_IN_1,
	P_GPIO_IN_2,
	P_GPIO_IN_3,
	P_GPIO_IN_4,
	P_GPIO_IN_5,
	P_GPIO_IN_6,
	P_GPIO_IN_AO,
};
#define P_GPIO_OUT(base,bit) (bit+(base<<5))
#define P_GPIO_OUT_NUM (sizeof(p_gpio_out_addr)/sizeof(p_gpio_out_addr[0]))
static unsigned p_gpio_out_addr[]={
	P_GPIO_OUT_0,
	P_GPIO_OUT_1,
	P_GPIO_OUT_2,
	P_GPIO_OUT_3,
	P_GPIO_OUT_4,
	P_GPIO_OUT_5,
	P_GPIO_OUT_6,
	P_GPIO_OUT_AO,
};
#define P_GPIO_OEN(base,bit) (bit+(base<<5))
#define P_GPIO_OEN_NUM (sizeof(p_gpio_oen_addr)/sizeof(p_gpio_oen_addr[0]))
static unsigned p_gpio_oen_addr[]={
	P_GPIO_OEN_0,
	P_GPIO_OEN_1,
	P_GPIO_OEN_2,
	P_GPIO_OEN_3,
	P_GPIO_OEN_4,
	P_GPIO_OEN_5,
	P_GPIO_OEN_6,
	P_GPIO_OEN_AO,
};
#define NOT_EXIST -1
struct pad_sig {pad_t pad;sig_t sig;unsigned enable; unsigned disable;};
#define foreach_pad_sig_start(pad,sig) {int __i;for(__i=0;__i<sizeof(pad_sig_tab)/sizeof(pad_sig_tab[0]);__i++){ unsigned __pad=pad,__sig=sig;  
#define case_pad_equal(enable,disable) if(pad_sig_tab[__i].pad==__pad&&pad_sig_tab[__i].sig!=__sig){ enable=pad_sig_tab[__i].enable;disable=pad_sig_tab[__i].disable
#define case_sig_equal(enable,disable) if(pad_sig_tab[__i].pad!=__pad&&pad_sig_tab[__i].sig==__sig){enable=pad_sig_tab[__i].enable;disable=pad_sig_tab[__i].disable
#define case_both_equal(enable,disable) if(pad_sig_tab[__i].pad==__pad&&pad_sig_tab[__i].sig==__sig){enable=pad_sig_tab[__i].enable;disable=pad_sig_tab[__i].disable
#define case_end };
#define foreach_pad_sig_end };}
static struct pad_sig pad_sig_tab[]={
	{.pad=PAD_GPIOY_7,.sig=SIG_RMII_RX_CLK,.enable=P_PIN_MUX_REG(6,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_3,.sig=SIG_FEC_D0_C,.enable=P_PIN_MUX_REG(6,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_9,.sig=SIG_SPDIF_out,.enable=P_PIN_MUX_REG(3,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_7,.sig=SIG_FEC_D7_A,.enable=P_PIN_MUX_REG(3,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_16,.sig=SIG_FEC_D0_OUT,.enable=P_PIN_MUX_REG(3,13),.disable=NOT_EXIST},
	{.pad=PAD_CARD_5,.sig=SIG_SDXC_CMD_B,.enable=P_PIN_MUX_REG(2,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_5,.sig=SIG_LCDin_R5,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_8,.sig=SIG_RMII_RX_DV,.enable=P_PIN_MUX_REG(6,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_6,.sig=SIG_SDXC_D6_A,.enable=P_PIN_MUX_REG(5,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_5,.sig=SIG_PCM_IN,.enable=P_PIN_MUX_REG(3,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_3,.sig=SIG_TCON_1_A,.enable=P_PIN_MUX_REG(0,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_16,.sig=SIG_UART_RTS_A,.enable=P_PIN_MUX_REG(4,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_26,.sig=SIG_LCDin_VS,.enable=P_PIN_MUX_REG(0,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_14,.sig=SIG_RMII_MDC,.enable=P_PIN_MUX_REG(6,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_24,.sig=SIG_ISO7816_DATA,.enable=P_PIN_MUX_REG(4,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_31,.sig=SIG_SPI_SS0,.enable=P_PIN_MUX_REG(8,16),.disable=NOT_EXIST},
	{.pad=PAD_CARD_3,.sig=SIG_SD_D3_B,.enable=P_PIN_MUX_REG(2,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_0,.sig=SIG_PWM_A,.enable=P_PIN_MUX_REG(2,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_PCM_FS,.enable=P_PIN_MUX_REG(4,24),.disable=NOT_EXIST},
	{.pad=PAD_CARD_2,.sig=SIG_SDXC_D2_B,.enable=P_PIN_MUX_REG(2,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_29,.sig=SIG_I2C_SDA,.enable=P_PIN_MUX_REG(8,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_1,.sig=SIG_FEC_D1_A,.enable=P_PIN_MUX_REG(3,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOZ_2,.sig=SIG_VS,.enable=P_PIN_MUX_REG(9,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_9,.sig=SIG_ENC_16,.enable=P_PIN_MUX_REG(7,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_19,.sig=SIG_LCDin_B3,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_5,.sig=SIG_LCD_R5,.enable=P_PIN_MUX_REG(0,0),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_0,.sig=SIG_SDXC_D0_C,.enable=P_PIN_MUX_REG(4,30),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_10,.sig=SIG_LCD_G2,.enable=P_PIN_MUX_REG(0,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_6,.sig=SIG_WD_GPIO,.enable=P_PIN_MUX_REG(10,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_6,.sig=SIG_PCM_FS,.enable=P_PIN_MUX_REG(3,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOE_6,.sig=SIG_I2S_OUT_CH2,.enable=P_PIN_MUX_REG(9,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_7,.sig=SIG_SDXC_D7_A,.enable=P_PIN_MUX_REG(5,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOE_7,.sig=SIG_I2S_OUT_BCLK,.enable=P_PIN_MUX_REG(9,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOE_0,.sig=SIG_I2S_IN_CH0,.enable=P_PIN_MUX_REG(9,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_5,.sig=SIG_I2C_SDA,.enable=P_PIN_MUX_REG(10,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_18,.sig=SIG_FEC_D2_OUT,.enable=P_PIN_MUX_REG(3,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_33,.sig=SIG_SPI_SCLK,.enable=P_PIN_MUX_REG(8,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_8,.sig=SIG_SD_CLK_A,.enable=P_PIN_MUX_REG(8,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_9,.sig=SIG_PWM_C,.enable=P_PIN_MUX_REG(3,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_0,.sig=SIG_SD_D0_A,.enable=P_PIN_MUX_REG(8,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_4,.sig=SIG_TCON_OEH_B,.enable=P_PIN_MUX_REG(1,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_4,.sig=SIG_SDXC_D4_A,.enable=P_PIN_MUX_REG(5,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_2,.sig=SIG_LCDin_R2,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_4,.sig=SIG_TCON_2_B,.enable=P_PIN_MUX_REG(0,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOE_6,.sig=SIG_I2S_OUT_MCLK,.enable=P_PIN_MUX_REG(9,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_2,.sig=SIG_LCD_R2,.enable=P_PIN_MUX_REG(0,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_10,.sig=SIG_HDMI_HPD_5V,.enable=P_PIN_MUX_REG(1,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_I2S_OUT_CH0,.enable=P_PIN_MUX_REG(8,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_I2S_IN_LR_CLK,.enable=P_PIN_MUX_REG(8,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_1,.sig=SIG_PWM_B,.enable=P_PIN_MUX_REG(2,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_11,.sig=SIG_FEC_FAIL_A,.enable=P_PIN_MUX_REG(3,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_1,.sig=SIG_SDXC_D1_A,.enable=P_PIN_MUX_REG(5,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_1,.sig=SIG_LED_BL_PWM,.enable=P_PIN_MUX_REG(1,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_0,.sig=SIG_UART_TX,.enable=P_PIN_MUX_REG(10,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_26,.sig=SIG_I2C_SCK_slave,.enable=P_PIN_MUX_REG(5,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_2,.sig=SIG_FEC_D2_B,.enable=P_PIN_MUX_REG(3,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOZ_1,.sig=SIG_HS,.enable=P_PIN_MUX_REG(9,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_6,.sig=SIG_TCON_OEV1,.enable=P_PIN_MUX_REG(1,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_5,.sig=SIG_UART_RX_PMIC,.enable=P_PIN_MUX_REG(10,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_6,.sig=SIG_FEC_D_VALID_C,.enable=P_PIN_MUX_REG(6,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_0,.sig=SIG_LCD_VGHL_PWM,.enable=P_PIN_MUX_REG(1,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_16,.sig=SIG_LCDin_B0,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_8,.sig=SIG_FEC_CLK_A,.enable=P_PIN_MUX_REG(3,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_1,.sig=SIG_VGA_VS,.enable=P_PIN_MUX_REG(0,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_23,.sig=SIG_UART_TX_B,.enable=P_PIN_MUX_REG(4,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_ISO7816_CLK,.enable=P_PIN_MUX_REG(4,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_25,.sig=SIG_ENC_13,.enable=P_PIN_MUX_REG(7,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_14,.sig=SIG_UART_RX_A,.enable=P_PIN_MUX_REG(4,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_8,.sig=SIG_TCON_6_A,.enable=P_PIN_MUX_REG(0,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_10,.sig=SIG_RMII_RX_DATA2,.enable=P_PIN_MUX_REG(6,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_1,.sig=SIG_LCD_R1,.enable=P_PIN_MUX_REG(0,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_4,.sig=SIG_I2C_SCK_SLAVE,.enable=P_PIN_MUX_REG(10,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_7,.sig=SIG_LCDin_R7,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_2,.sig=SIG_NAND_IO_2,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_5,.sig=SIG_FEC_D5_A,.enable=P_PIN_MUX_REG(3,5),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_12,.sig=SIG_NAND_ALE,.enable=P_PIN_MUX_REG(2,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_6,.sig=SIG_RMII_TX_DATA0,.enable=P_PIN_MUX_REG(6,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_23,.sig=SIG_LCD_B7,.enable=P_PIN_MUX_REG(0,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOE_7,.sig=SIG_I2S_OUT_CH3,.enable=P_PIN_MUX_REG(9,1),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_9,.sig=SIG_NAND_CE1,.enable=P_PIN_MUX_REG(2,24),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_13,.sig=SIG_NAND_CLE,.enable=P_PIN_MUX_REG(2,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_24,.sig=SIG_ENC_12,.enable=P_PIN_MUX_REG(7,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_21,.sig=SIG_LCDin_B5,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_6,.sig=SIG_NAND_IO_6,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_9,.sig=SIG_TCON_7_B,.enable=P_PIN_MUX_REG(0,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOE_5,.sig=SIG_I2S_OUT_LR_CLK,.enable=P_PIN_MUX_REG(9,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_10,.sig=SIG_FEC_D_VALID_B,.enable=P_PIN_MUX_REG(3,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_6,.sig=SIG_FEC_D6_B,.enable=P_PIN_MUX_REG(3,11),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_0,.sig=SIG_I2C_SDA,.enable=P_PIN_MUX_REG(3,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOZ_10,.sig=SIG_D7,.enable=P_PIN_MUX_REG(9,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_12,.sig=SIG_ENC_0,.enable=P_PIN_MUX_REG(7,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_9,.sig=SIG_MP2_PLL,.enable=P_PIN_MUX_REG(5,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_2,.sig=SIG_TCON_0_B,.enable=P_PIN_MUX_REG(0,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_22,.sig=SIG_LCD_B6,.enable=P_PIN_MUX_REG(0,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_8,.sig=SIG_FEC_CLK_B,.enable=P_PIN_MUX_REG(3,9),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_16,.sig=SIG_NAND_DQS,.enable=P_PIN_MUX_REG(2,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_12,.sig=SIG_FEC_FAIL_OUT,.enable=P_PIN_MUX_REG(3,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_22,.sig=SIG_ISO7816_RESET,.enable=P_PIN_MUX_REG(4,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_4,.sig=SIG_DDR_PLL,.enable=P_PIN_MUX_REG(5,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_9,.sig=SIG_SDXC_CMD_A,.enable=P_PIN_MUX_REG(5,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_0,.sig=SIG_FEC_D0_B,.enable=P_PIN_MUX_REG(3,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_UART_CTS_B,.enable=P_PIN_MUX_REG(4,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_9,.sig=SIG_LCDin_G1,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOE_8,.sig=SIG_SPDIF_OUT,.enable=P_PIN_MUX_REG(9,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_7,.sig=SIG_MP0_PLL,.enable=P_PIN_MUX_REG(5,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_15,.sig=SIG_ENC_3,.enable=P_PIN_MUX_REG(7,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_14,.sig=SIG_FEC_SOP_OUT,.enable=P_PIN_MUX_REG(3,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_6,.sig=SIG_TCON_OEV1_B,.enable=P_PIN_MUX_REG(1,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_13,.sig=SIG_HDMI_CEC,.enable=P_PIN_MUX_REG(1,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_6,.sig=SIG_TCON_4_A,.enable=P_PIN_MUX_REG(0,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_3,.sig=SIG_RMII_TX_DATA3,.enable=P_PIN_MUX_REG(6,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOZ_0,.sig=SIG_IDQ,.enable=P_PIN_MUX_REG(9,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_14,.sig=SIG_LCDin_G6,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOE_3,.sig=SIG_I2S_IN_BCLK,.enable=P_PIN_MUX_REG(9,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_2,.sig=SIG_UART_TX_PMIC,.enable=P_PIN_MUX_REG(10,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_3,.sig=SIG_UART_RTS,.enable=P_PIN_MUX_REG(10,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_3,.sig=SIG_FEC_D3_A,.enable=P_PIN_MUX_REG(3,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_9,.sig=SIG_FEC_SOP_A,.enable=P_PIN_MUX_REG(3,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_12,.sig=SIG_RMII_RX_DATA0,.enable=P_PIN_MUX_REG(6,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_23,.sig=SIG_ISO7816_CLK,.enable=P_PIN_MUX_REG(4,15),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_13,.sig=SIG_SPI_NOR_Q_A,.enable=P_PIN_MUX_REG(5,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_7,.sig=SIG_TCON_CPH1,.enable=P_PIN_MUX_REG(1,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_0,.sig=SIG_LCD_VGHL_PWM,.enable=P_PIN_MUX_REG(1,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_9,.sig=SIG_PWM_A,.enable=P_PIN_MUX_REG(3,26),.disable=NOT_EXIST},
	{.pad=PAD_TEST_N,.sig=SIG_WD_GPIO,.enable=P_PIN_MUX_REG(10,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_16,.sig=SIG_ENC_4,.enable=P_PIN_MUX_REG(7,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_32,.sig=SIG_SPI_SS1,.enable=P_PIN_MUX_REG(8,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_7,.sig=SIG_TCON_CPH50,.enable=P_PIN_MUX_REG(1,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_23,.sig=SIG_LCDin_B7,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_3,.sig=SIG_SD_D3_A,.enable=P_PIN_MUX_REG(8,2),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_0,.sig=SIG_NAND_IO_0,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_9,.sig=SIG_ENC_17,.enable=P_PIN_MUX_REG(7,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_7,.sig=SIG_TCON_5_B,.enable=P_PIN_MUX_REG(0,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_6,.sig=SIG_CLK_OUT,.enable=P_PIN_MUX_REG(10,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_11,.sig=SIG_LCDin_G3,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_1,.sig=SIG_I2C_SCL,.enable=P_PIN_MUX_REG(3,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_2,.sig=SIG_RMII_TX_EN,.enable=P_PIN_MUX_REG(6,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_19,.sig=SIG_ENC_7,.enable=P_PIN_MUX_REG(7,7),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_11,.sig=SIG_SDXC_CLK_C,.enable=P_PIN_MUX_REG(4,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_4,.sig=SIG_FEC_D4_B,.enable=P_PIN_MUX_REG(3,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOZ_5,.sig=SIG_D2,.enable=P_PIN_MUX_REG(9,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOE_4,.sig=SIG_I2S_OUT_CH0,.enable=P_PIN_MUX_REG(9,4),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_4,.sig=SIG_NAND_IO_4,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_13,.sig=SIG_RMII_MDIO,.enable=P_PIN_MUX_REG(6,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_0,.sig=SIG_REF_CLK_IN,.enable=P_PIN_MUX_REG(6,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_UART_RTS_B,.enable=P_PIN_MUX_REG(4,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_2,.sig=SIG_SD_D2_A,.enable=P_PIN_MUX_REG(8,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_1,.sig=SIG_UART_RX,.enable=P_PIN_MUX_REG(10,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_8,.sig=SIG_LCD_G0,.enable=P_PIN_MUX_REG(0,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_7,.sig=SIG_TCON_CPH3,.enable=P_PIN_MUX_REG(1,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_21,.sig=SIG_ENC_9,.enable=P_PIN_MUX_REG(7,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_12,.sig=SIG_HDMI_SCL_5V,.enable=P_PIN_MUX_REG(1,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_26,.sig=SIG_I2C_SCK,.enable=P_PIN_MUX_REG(5,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_2,.sig=SIG_TCON_STH1_B,.enable=P_PIN_MUX_REG(1,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_4,.sig=SIG_TCON_OEH,.enable=P_PIN_MUX_REG(1,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_9,.sig=SIG_FEC_SOP_B,.enable=P_PIN_MUX_REG(3,8),.disable=NOT_EXIST},
	{.pad=PAD_CARD_4,.sig=SIG_SD_CLK_B,.enable=P_PIN_MUX_REG(2,11),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_6,.sig=SIG_SDXC_D6_C,.enable=P_PIN_MUX_REG(4,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_23,.sig=SIG_FEC_D7_OUT,.enable=P_PIN_MUX_REG(3,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_4,.sig=SIG_TCON_2_A,.enable=P_PIN_MUX_REG(0,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_27,.sig=SIG_I2C_SDA_slave,.enable=P_PIN_MUX_REG(5,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_13,.sig=SIG_LCD_G5,.enable=P_PIN_MUX_REG(0,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_11,.sig=SIG_RMII_RX_DATA1,.enable=P_PIN_MUX_REG(6,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_1,.sig=SIG_SD_D1_A,.enable=P_PIN_MUX_REG(8,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_7,.sig=SIG_TCON_CPH2,.enable=P_PIN_MUX_REG(1,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_2,.sig=SIG_I2C_SCK,.enable=P_PIN_MUX_REG(10,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_17,.sig=SIG_LCD_B1,.enable=P_PIN_MUX_REG(0,5),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_3,.sig=SIG_SDXC_D3_C,.enable=P_PIN_MUX_REG(4,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_11,.sig=SIG_HDMI_CH0_TMDS,.enable=P_PIN_MUX_REG(5,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOZ_11,.sig=SIG_CLK,.enable=P_PIN_MUX_REG(9,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_0,.sig=SIG_PWM_C,.enable=P_PIN_MUX_REG(2,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_8,.sig=SIG_TCON_VCOM,.enable=P_PIN_MUX_REG(1,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_8,.sig=SIG_TCON_VCOM_B,.enable=P_PIN_MUX_REG(1,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_34,.sig=SIG_SPI_MOSI,.enable=P_PIN_MUX_REG(8,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_11,.sig=SIG_FEC_FAIL_B,.enable=P_PIN_MUX_REG(3,6),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_10,.sig=SIG_SDXC_CMD_C,.enable=P_PIN_MUX_REG(4,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_13,.sig=SIG_UART_TX_A,.enable=P_PIN_MUX_REG(4,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_4,.sig=SIG_UART_TX_PMIC,.enable=P_PIN_MUX_REG(10,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_5,.sig=SIG_I2C_SDA_SLAVE,.enable=P_PIN_MUX_REG(10,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_7,.sig=SIG_LCD_R7,.enable=P_PIN_MUX_REG(0,0),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_4,.sig=SIG_SDXC_D4_C,.enable=P_PIN_MUX_REG(4,28),.disable=NOT_EXIST},
	{.pad=PAD_CARD_3,.sig=SIG_SDXC_D3_B,.enable=P_PIN_MUX_REG(2,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_2,.sig=SIG_UART_CTS,.enable=P_PIN_MUX_REG(10,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_12,.sig=SIG_LCD_G4,.enable=P_PIN_MUX_REG(0,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_5,.sig=SIG_TCON_3_B,.enable=P_PIN_MUX_REG(0,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_13,.sig=SIG_LCDin_G5,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_ISO7816_DATA,.enable=P_PIN_MUX_REG(4,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOE_5,.sig=SIG_I2S_OUT_CH1,.enable=P_PIN_MUX_REG(9,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_16,.sig=SIG_LCD_B0,.enable=P_PIN_MUX_REG(0,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_9,.sig=SIG_SD_CMD_A,.enable=P_PIN_MUX_REG(8,0),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_14,.sig=SIG_SPI_NOR_C_A,.enable=P_PIN_MUX_REG(5,2),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_1,.sig=SIG_SDXC_D1_C,.enable=P_PIN_MUX_REG(4,29),.disable=NOT_EXIST},
	{.pad=PAD_CARD_0,.sig=SIG_SDXC_D0_B,.enable=P_PIN_MUX_REG(2,7),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_17,.sig=SIG_SPI_NOR_CS_n_A,.enable=P_PIN_MUX_REG(5,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_3,.sig=SIG_FEC_D3_B,.enable=P_PIN_MUX_REG(3,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_28,.sig=SIG_I2C_SCK,.enable=P_PIN_MUX_REG(5,30),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_7,.sig=SIG_TCON_CPH50_B,.enable=P_PIN_MUX_REG(1,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_I2S_IN_BLCK,.enable=P_PIN_MUX_REG(8,30),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_4,.sig=SIG_LCD_R4,.enable=P_PIN_MUX_REG(0,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOZ_6,.sig=SIG_D3,.enable=P_PIN_MUX_REG(9,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_UART_RX_B,.enable=P_PIN_MUX_REG(4,8),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_12,.sig=SIG_SPI_NOR_D_A,.enable=P_PIN_MUX_REG(5,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_7,.sig=SIG_REMOTE,.enable=P_PIN_MUX_REG(10,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOE_3,.sig=SIG_I2S_OUT_BCLK,.enable=P_PIN_MUX_REG(9,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_5,.sig=SIG_SDXC_D5_A,.enable=P_PIN_MUX_REG(5,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_8,.sig=SIG_SPDIF_in,.enable=P_PIN_MUX_REG(3,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOZ_0,.sig=SIG_FIR,.enable=P_PIN_MUX_REG(9,18),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_10,.sig=SIG_NAND_CE2,.enable=P_PIN_MUX_REG(2,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_9,.sig=SIG_TCON_7_A,.enable=P_PIN_MUX_REG(0,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOE_1,.sig=SIG_I2S_IN_LR_CLK,.enable=P_PIN_MUX_REG(9,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_20,.sig=SIG_FEC_D4_OUT,.enable=P_PIN_MUX_REG(3,12),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_3,.sig=SIG_NAND_IO_3,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_4,.sig=SIG_I2C_SCK,.enable=P_PIN_MUX_REG(10,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_3,.sig=SIG_SYS_PLL_DIV3,.enable=P_PIN_MUX_REG(5,23),.disable=NOT_EXIST},
	{.pad=PAD_CARD_1,.sig=SIG_SDXC_D1_B,.enable=P_PIN_MUX_REG(2,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_2,.sig=SIG_SDXC_D2_A,.enable=P_PIN_MUX_REG(5,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOE_2,.sig=SIG_I2S_OUT_MCLK,.enable=P_PIN_MUX_REG(9,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_27,.sig=SIG_ENC_15,.enable=P_PIN_MUX_REG(7,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_6,.sig=SIG_FEC_D6_A,.enable=P_PIN_MUX_REG(3,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_10,.sig=SIG_LCDin_G2,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_4,.sig=SIG_RMII_TX_DATA2,.enable=P_PIN_MUX_REG(6,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_I2S_OUT_BCLK,.enable=P_PIN_MUX_REG(8,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_2,.sig=SIG_TCON_0_A,.enable=P_PIN_MUX_REG(0,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_22,.sig=SIG_UART_RX_C,.enable=P_PIN_MUX_REG(4,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_3,.sig=SIG_LCD_R3,.enable=P_PIN_MUX_REG(0,0),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_15,.sig=SIG_NAND_REn_WR,.enable=P_PIN_MUX_REG(2,18),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_7,.sig=SIG_NAND_IO_7,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_11,.sig=SIG_SD_CLK_C,.enable=P_PIN_MUX_REG(6,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_2,.sig=SIG_I2C_CLK_SLAVE,.enable=P_PIN_MUX_REG(10,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_3,.sig=SIG_SDXC_D3_A,.enable=P_PIN_MUX_REG(5,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_35,.sig=SIG_SPI_MISO,.enable=P_PIN_MUX_REG(8,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_17,.sig=SIG_I2S_OUT_MCLK,.enable=P_PIN_MUX_REG(8,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_0,.sig=SIG_FEC_D0_A,.enable=P_PIN_MUX_REG(3,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_7,.sig=SIG_PCM_CLK,.enable=P_PIN_MUX_REG(3,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_22,.sig=SIG_FEC_D6_OUT,.enable=P_PIN_MUX_REG(3,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_24,.sig=SIG_LCDin_CLK,.enable=P_PIN_MUX_REG(0,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_11,.sig=SIG_CLK_OUT,.enable=P_PIN_MUX_REG(10,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_0,.sig=SIG_SDXC_D0_A,.enable=P_PIN_MUX_REG(5,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_1,.sig=SIG_RMII_TX_CLK,.enable=P_PIN_MUX_REG(6,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_0,.sig=SIG_LCD_R0,.enable=P_PIN_MUX_REG(0,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_23,.sig=SIG_UART_CTS_C,.enable=P_PIN_MUX_REG(4,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_26,.sig=SIG_ENC_14,.enable=P_PIN_MUX_REG(7,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_7,.sig=SIG_FEC_D7_B,.enable=P_PIN_MUX_REG(3,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_4,.sig=SIG_LCDin_R4,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_30,.sig=SIG_SPI_RDYn,.enable=P_PIN_MUX_REG(8,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_15,.sig=SIG_LCDin_G7,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_0,.sig=SIG_REF_CLK_OUT,.enable=P_PIN_MUX_REG(6,30),.disable=NOT_EXIST},
	{.pad=PAD_CARD_2,.sig=SIG_SD_D2_B,.enable=P_PIN_MUX_REG(2,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOZ_3,.sig=SIG_D0,.enable=P_PIN_MUX_REG(9,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_3,.sig=SIG_TCON_1_B,.enable=P_PIN_MUX_REG(0,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_12,.sig=SIG_CLK_OUT,.enable=P_PIN_MUX_REG(3,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_ISO7816_RESET,.enable=P_PIN_MUX_REG(4,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_23,.sig=SIG_ENC_11,.enable=P_PIN_MUX_REG(7,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_1,.sig=SIG_FEC_D1_B,.enable=P_PIN_MUX_REG(3,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_18,.sig=SIG_LCDin_B2,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOZ_7,.sig=SIG_D4,.enable=P_PIN_MUX_REG(9,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_30,.sig=SIG_I2C_SCK_slave,.enable=P_PIN_MUX_REG(8,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_29,.sig=SIG_I2C_SDA_slave,.enable=P_PIN_MUX_REG(8,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_PCM_IN,.enable=P_PIN_MUX_REG(4,22),.disable=NOT_EXIST},
	{.pad=PAD_CARD_4,.sig=SIG_SDXC_CLK_B,.enable=P_PIN_MUX_REG(2,5),.disable=NOT_EXIST},
	{.pad=PAD_CARD_1,.sig=SIG_SD_D1_B,.enable=P_PIN_MUX_REG(2,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_7,.sig=SIG_TCON_5_A,.enable=P_PIN_MUX_REG(0,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_13,.sig=SIG_ENC_1,.enable=P_PIN_MUX_REG(7,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_I2S_IN_CH0,.enable=P_PIN_MUX_REG(8,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_1,.sig=SIG_LCDin_R1,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_12,.sig=SIG_LCDin_G4,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_I2S_OUT_LR_CLK,.enable=P_PIN_MUX_REG(8,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_21,.sig=SIG_LCD_B5,.enable=P_PIN_MUX_REG(0,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_29,.sig=SIG_SPI_SS2,.enable=P_PIN_MUX_REG(8,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_17,.sig=SIG_ISO7816_DET,.enable=P_PIN_MUX_REG(4,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_4,.sig=SIG_FEC_D4_A,.enable=P_PIN_MUX_REG(3,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_22,.sig=SIG_ENC_10,.enable=P_PIN_MUX_REG(7,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_15,.sig=SIG_UART_CTS_A,.enable=P_PIN_MUX_REG(4,11),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_11,.sig=SIG_NAND_RB1,.enable=P_PIN_MUX_REG(2,16),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_1,.sig=SIG_NAND_IO_1,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_8,.sig=SIG_MP1_PLL,.enable=P_PIN_MUX_REG(5,18),.disable=NOT_EXIST},
	{.pad=PAD_CARD_0,.sig=SIG_SD_D0_B,.enable=P_PIN_MUX_REG(2,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_17,.sig=SIG_PCM_CLK,.enable=P_PIN_MUX_REG(4,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_2,.sig=SIG_TCON_STH1,.enable=P_PIN_MUX_REG(1,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_5,.sig=SIG_VID_PLL,.enable=P_PIN_MUX_REG(5,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_25,.sig=SIG_I2C_SDA_slave,.enable=P_PIN_MUX_REG(5,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_4,.sig=SIG_FEC_CLK_C,.enable=P_PIN_MUX_REG(6,22),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_3,.sig=SIG_SD_D3_C,.enable=P_PIN_MUX_REG(6,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_1,.sig=SIG_LED_BL_PWM,.enable=P_PIN_MUX_REG(1,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_24,.sig=SIG_UART_RX_B,.enable=P_PIN_MUX_REG(4,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_8,.sig=SIG_TCON_6_B,.enable=P_PIN_MUX_REG(0,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_14,.sig=SIG_ENC_2,.enable=P_PIN_MUX_REG(7,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_28,.sig=SIG_I2C_SCK_slave,.enable=P_PIN_MUX_REG(5,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_20,.sig=SIG_LCD_B4,.enable=P_PIN_MUX_REG(0,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_6,.sig=SIG_LCDin_R6,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_5,.sig=SIG_NAND_IO_5,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_5,.sig=SIG_FEC_D5_B,.enable=P_PIN_MUX_REG(3,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_21,.sig=SIG_FEC_D5_OUT,.enable=P_PIN_MUX_REG(3,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_3,.sig=SIG_I2C_SDA_SLAVE,.enable=P_PIN_MUX_REG(10,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOZ_4,.sig=SIG_D1,.enable=P_PIN_MUX_REG(9,14),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_2,.sig=SIG_SD_D2_C,.enable=P_PIN_MUX_REG(6,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_17,.sig=SIG_ENC_5,.enable=P_PIN_MUX_REG(7,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_25,.sig=SIG_I2C_SDA,.enable=P_PIN_MUX_REG(5,27),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_14,.sig=SIG_NAND_WEn_CLK,.enable=P_PIN_MUX_REG(2,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_17,.sig=SIG_FEC_D1_OUT,.enable=P_PIN_MUX_REG(3,12),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_8,.sig=SIG_NAND_CE0,.enable=P_PIN_MUX_REG(2,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_7,.sig=SIG_FEC_FAIL_C,.enable=P_PIN_MUX_REG(6,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_0,.sig=SIG_VGA_HS,.enable=P_PIN_MUX_REG(0,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_20,.sig=SIG_LCDin_B4,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOZ_8,.sig=SIG_D5,.enable=P_PIN_MUX_REG(9,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOZ_12,.sig=SIG_CLK_OUT,.enable=P_PIN_MUX_REG(9,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_4,.sig=SIG_PCM_OUT,.enable=P_PIN_MUX_REG(3,30),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_5,.sig=SIG_TCON_3_A,.enable=P_PIN_MUX_REG(0,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_3,.sig=SIG_LCDin_R3,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_7,.sig=SIG_TCON_CPH2,.enable=P_PIN_MUX_REG(1,3),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_1,.sig=SIG_SD_D1_C,.enable=P_PIN_MUX_REG(6,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_11,.sig=SIG_HDMI_SDA_5V,.enable=P_PIN_MUX_REG(1,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_13,.sig=SIG_FEC_D_VALID_OUT,.enable=P_PIN_MUX_REG(3,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_25,.sig=SIG_LCDin_HS,.enable=P_PIN_MUX_REG(0,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_5,.sig=SIG_RMII_TX_DATA1,.enable=P_PIN_MUX_REG(6,14),.disable=NOT_EXIST},
	{.pad=PAD_CARD_5,.sig=SIG_SD_CMD_B,.enable=P_PIN_MUX_REG(2,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_18,.sig=SIG_ENC_6,.enable=P_PIN_MUX_REG(7,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_19,.sig=SIG_FEC_D3_OUT,.enable=P_PIN_MUX_REG(3,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_2,.sig=SIG_FEC_D2_A,.enable=P_PIN_MUX_REG(3,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_15,.sig=SIG_LCD_G7,.enable=P_PIN_MUX_REG(0,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_17,.sig=SIG_UART_TX_B,.enable=P_PIN_MUX_REG(4,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_5,.sig=SIG_TCON_CPV1_B,.enable=P_PIN_MUX_REG(1,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_17,.sig=SIG_LCDin_B1,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_8,.sig=SIG_LCDin_G0,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_19,.sig=SIG_LCD_B3,.enable=P_PIN_MUX_REG(0,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_7,.sig=SIG_TCON_CPH1,.enable=P_PIN_MUX_REG(1,14),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_7,.sig=SIG_SDXC_D7_C,.enable=P_PIN_MUX_REG(4,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_24,.sig=SIG_UART_RTS_C,.enable=P_PIN_MUX_REG(4,0),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_11,.sig=SIG_NAND_CE3,.enable=P_PIN_MUX_REG(2,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_21,.sig=SIG_ISO7816_DET,.enable=P_PIN_MUX_REG(4,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_30,.sig=SIG_I2C_SCK,.enable=P_PIN_MUX_REG(8,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_9,.sig=SIG_LCD_G1,.enable=P_PIN_MUX_REG(0,3),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_0,.sig=SIG_SD_D0_C,.enable=P_PIN_MUX_REG(6,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_10,.sig=SIG_FCLK_DIV5,.enable=P_PIN_MUX_REG(5,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_6,.sig=SIG_TCON_4_B,.enable=P_PIN_MUX_REG(0,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_27,.sig=SIG_I2C_SDA,.enable=P_PIN_MUX_REG(5,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_5,.sig=SIG_TCON_CPV1,.enable=P_PIN_MUX_REG(1,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_3,.sig=SIG_UART_RX_PMIC,.enable=P_PIN_MUX_REG(10,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_20,.sig=SIG_ENC_8,.enable=P_PIN_MUX_REG(7,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_0,.sig=SIG_LCDin_R0,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_3,.sig=SIG_TCON_STV1_B,.enable=P_PIN_MUX_REG(1,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_3,.sig=SIG_TCON_STV1,.enable=P_PIN_MUX_REG(1,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_1,.sig=SIG_PWM_D,.enable=P_PIN_MUX_REG(2,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_21,.sig=SIG_UART_TX_C,.enable=P_PIN_MUX_REG(4,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOE_1,.sig=SIG_I2S_OUT_LR_CLK,.enable=P_PIN_MUX_REG(9,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_8,.sig=SIG_SDXC_CLK_A,.enable=P_PIN_MUX_REG(5,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_27,.sig=SIG_LCDin_DE,.enable=P_PIN_MUX_REG(0,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_15,.sig=SIG_FEC_CLK_OUT,.enable=P_PIN_MUX_REG(3,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_14,.sig=SIG_LCD_G6,.enable=P_PIN_MUX_REG(0,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_5,.sig=SIG_FEC_SOP_C,.enable=P_PIN_MUX_REG(6,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_3,.sig=SIG_I2C_SDA,.enable=P_PIN_MUX_REG(10,7),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_10,.sig=SIG_NAND_RB0,.enable=P_PIN_MUX_REG(2,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_9,.sig=SIG_RMII_RX_DATA3,.enable=P_PIN_MUX_REG(6,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_18,.sig=SIG_LCD_B2,.enable=P_PIN_MUX_REG(0,4),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_5,.sig=SIG_SDXC_D5_C,.enable=P_PIN_MUX_REG(4,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_6,.sig=SIG_VID2_PLL,.enable=P_PIN_MUX_REG(5,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_10,.sig=SIG_FEC_D_VALID_A,.enable=P_PIN_MUX_REG(3,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_22,.sig=SIG_LCDin_B6,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_15,.sig=SIG_CLK_OUT,.enable=P_PIN_MUX_REG(3,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_PCM_OUT,.enable=P_PIN_MUX_REG(4,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_6,.sig=SIG_LCD_R6,.enable=P_PIN_MUX_REG(0,0),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_2,.sig=SIG_SDXC_D2_C,.enable=P_PIN_MUX_REG(4,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_7,.sig=SIG_TCON_CPH3,.enable=P_PIN_MUX_REG(1,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_11,.sig=SIG_LCD_G3,.enable=P_PIN_MUX_REG(0,2),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_10,.sig=SIG_SD_CMD_C,.enable=P_PIN_MUX_REG(6,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOZ_9,.sig=SIG_D6,.enable=P_PIN_MUX_REG(9,14),.disable=NOT_EXIST},
};
static const char * pad_name[]={
	[184]="GPIOAO_2",
	[150]="GPIOB_20",
	[185]="GPIOAO_3",
	[151]="GPIOB_21",
	[186]="GPIOAO_4",
	[152]="GPIOB_22",
	[187]="GPIOAO_5",
	[153]="GPIOB_23",
	[188]="GPIOAO_6",
	[189]="GPIOAO_7",
	[190]="GPIOAO_8",
	[191]="GPIOAO_9",
	[23]="GPIOE_10",
	[24]="GPIOE_11",
	[51]="GPIOX_10",
	[41]="GPIOX_0",
	[192]="GPIOAO_10",
	[52]="GPIOX_11",
	[42]="GPIOX_1",
	[193]="GPIOAO_11",
	[53]="GPIOX_12",
	[43]="GPIOX_2",
	[54]="GPIOX_13",
	[44]="GPIOX_3",
	[154]="GPIOA_0",
	[55]="GPIOX_14",
	[45]="GPIOX_4",
	[155]="GPIOA_1",
	[56]="GPIOX_15",
	[46]="GPIOX_5",
	[156]="GPIOA_2",
	[57]="GPIOX_16",
	[47]="GPIOX_6",
	[157]="GPIOA_3",
	[71]="GPIOX_30",
	[58]="GPIOX_17",
	[48]="GPIOX_7",
	[194]="TEST_N",
	[158]="GPIOA_4",
	[72]="GPIOX_31",
	[59]="GPIOX_18",
	[49]="GPIOX_8",
	[159]="GPIOA_5",
	[95]="GPIOD_0",
	[73]="GPIOX_32",
	[60]="GPIOX_19",
	[50]="GPIOX_9",
	[160]="GPIOA_6",
	[96]="GPIOD_1",
	[74]="GPIOX_33",
	[161]="GPIOA_7",
	[97]="GPIOD_2",
	[75]="GPIOX_34",
	[162]="GPIOA_8",
	[98]="GPIOD_3",
	[76]="GPIOX_35",
	[163]="GPIOA_9",
	[99]="GPIOD_4",
	[164]="GPIOA_10",
	[100]="GPIOD_5",
	[165]="GPIOA_11",
	[101]="GPIOD_6",
	[166]="GPIOA_12",
	[102]="GPIOD_7",
	[167]="GPIOA_13",
	[103]="GPIOD_8",
	[168]="GPIOA_14",
	[104]="GPIOD_9",
	[169]="GPIOA_15",
	[170]="GPIOA_16",
	[171]="GPIOA_17",
	[172]="GPIOA_18",
	[173]="GPIOA_19",
	[35]="GPIOY_10",
	[36]="GPIOY_11",
	[37]="GPIOY_12",
	[38]="GPIOY_13",
	[39]="GPIOY_14",
	[40]="GPIOY_15",
	[140]="GPIOB_10",
	[141]="GPIOB_11",
	[142]="GPIOB_12",
	[143]="GPIOB_13",
	[25]="GPIOY_0",
	[144]="GPIOB_14",
	[26]="GPIOY_1",
	[145]="GPIOB_15",
	[27]="GPIOY_2",
	[146]="GPIOB_16",
	[28]="GPIOY_3",
	[147]="GPIOB_17",
	[130]="GPIOB_0",
	[29]="GPIOY_4",
	[148]="GPIOB_18",
	[131]="GPIOB_1",
	[30]="GPIOY_5",
	[149]="GPIOB_19",
	[132]="GPIOB_2",
	[31]="GPIOY_6",
	[133]="GPIOB_3",
	[32]="GPIOY_7",
	[134]="GPIOB_4",
	[33]="GPIOY_8",
	[135]="GPIOB_5",
	[34]="GPIOY_9",
	[13]="GPIOE_0",
	[136]="GPIOB_6",
	[10]="GPIOZ_10",
	[14]="GPIOE_1",
	[137]="GPIOB_7",
	[11]="GPIOZ_11",
	[15]="GPIOE_2",
	[138]="GPIOB_8",
	[12]="GPIOZ_12",
	[16]="GPIOE_3",
	[139]="GPIOB_9",
	[17]="GPIOE_4",
	[18]="GPIOE_5",
	[19]="GPIOE_6",
	[20]="GPIOE_7",
	[77]="BOOT_0",
	[21]="GPIOE_8",
	[78]="BOOT_1",
	[22]="GPIOE_9",
	[79]="BOOT_2",
	[80]="BOOT_3",
	[81]="BOOT_4",
	[82]="BOOT_5",
	[83]="BOOT_6",
	[61]="GPIOX_20",
	[115]="GPIOC_10",
	[84]="BOOT_7",
	[62]="GPIOX_21",
	[116]="GPIOC_11",
	[85]="BOOT_8",
	[63]="GPIOX_22",
	[117]="GPIOC_12",
	[86]="BOOT_9",
	[64]="GPIOX_23",
	[118]="GPIOC_13",
	[65]="GPIOX_24",
	[119]="GPIOC_14",
	[66]="GPIOX_25",
	[120]="GPIOC_15",
	[67]="GPIOX_26",
	[68]="GPIOX_27",
	[69]="GPIOX_28",
	[70]="GPIOX_29",
	[174]="GPIOA_20",
	[175]="GPIOA_21",
	[176]="GPIOA_22",
	[177]="GPIOA_23",
	[178]="GPIOA_24",
	[179]="GPIOA_25",
	[180]="GPIOA_26",
	[87]="BOOT_10",
	[181]="GPIOA_27",
	[88]="BOOT_11",
	[0]="GPIOZ_0",
	[89]="BOOT_12",
	[1]="GPIOZ_1",
	[121]="CARD_0",
	[90]="BOOT_13",
	[2]="GPIOZ_2",
	[122]="CARD_1",
	[91]="BOOT_14",
	[3]="GPIOZ_3",
	[123]="CARD_2",
	[105]="GPIOC_0",
	[92]="BOOT_15",
	[4]="GPIOZ_4",
	[124]="CARD_3",
	[106]="GPIOC_1",
	[93]="BOOT_16",
	[5]="GPIOZ_5",
	[125]="CARD_4",
	[107]="GPIOC_2",
	[94]="BOOT_17",
	[6]="GPIOZ_6",
	[126]="CARD_5",
	[108]="GPIOC_3",
	[7]="GPIOZ_7",
	[127]="CARD_6",
	[109]="GPIOC_4",
	[8]="GPIOZ_8",
	[128]="CARD_7",
	[110]="GPIOC_5",
	[9]="GPIOZ_9",
	[129]="CARD_8",
	[111]="GPIOC_6",
	[112]="GPIOC_7",
	[113]="GPIOC_8",
	[114]="GPIOC_9",
	[182]="GPIOAO_0",
	[183]="GPIOAO_1",
	[PAD_MAX_PADS]=NULL
};
static const char * sig_name[]={
	[108]="SDXC_D7_C",
	[26]="REF_CLK_OUT",
	[314]="UART_RX_PMIC",
	[259]="FEC_D5_A",
	[274]="FEC_FAIL_A",
	[202]="FEC_D5_B",
	[81]="I2C_SCK_slave",
	[220]="FEC_FAIL_B",
	[173]="TCON_7_A",
	[3]="VS",
	[266]="FEC_FAIL_C",
	[152]="TCON_7_B",
	[168]="SPDIF_in",
	[61]="UART_TX_A",
	[276]="ENC_0",
	[65]="UART_TX_B",
	[278]="ENC_1",
	[74]="UART_TX_C",
	[280]="ENC_2",
	[282]="ENC_3",
	[157]="TCON_STH1",
	[151]="PWM_A",
	[57]="SD_CLK_A",
	[28]="RMII_TX_EN",
	[284]="ENC_4",
	[231]="FEC_D0_OUT",
	[186]="SD_CLK_B",
	[154]="PWM_B",
	[80]="I2C_SCK",
	[17]="I2S_OUT_MCLK",
	[286]="ENC_5",
	[129]="PWM_C",
	[116]="SD_CLK_C",
	[95]="I2C_SCL",
	[288]="ENC_6",
	[207]="VID2_PLL",
	[131]="PWM_D",
	[18]="I2S_IN_BCLK",
	[290]="ENC_7",
	[292]="ENC_8",
	[294]="ENC_9",
	[317]="WD_GPIO",
	[71]="ISO7816_CLK",
	[198]="SYS_PLL_DIV3",
	[309]="UART_RX",
	[34]="RMII_RX_DV",
	[285]="LCDin_B0",
	[91]="NAND_IO_0",
	[86]="SPI_SCLK",
	[38]="RMII_RX_DATA0",
	[287]="LCDin_B1",
	[120]="SPI_NOR_D_A",
	[94]="NAND_IO_1",
	[37]="RMII_RX_DATA1",
	[289]="LCDin_B2",
	[98]="NAND_IO_2",
	[36]="RMII_RX_DATA2",
	[20]="I2S_OUT_CH0",
	[291]="LCDin_B3",
	[101]="NAND_IO_3",
	[35]="RMII_RX_DATA3",
	[21]="I2S_OUT_CH1",
	[293]="LCDin_B4",
	[115]="NAND_RB0",
	[103]="NAND_IO_4",
	[22]="I2S_OUT_CH2",
	[295]="LCDin_B5",
	[119]="NAND_RB1",
	[105]="NAND_IO_5",
	[23]="I2S_OUT_CH3",
	[308]="UART_TX",
	[297]="LCDin_B6",
	[272]="FEC_D_VALID_A",
	[153]="VGA_HS",
	[107]="NAND_IO_6",
	[299]="LCDin_B7",
	[217]="FEC_D_VALID_B",
	[109]="NAND_IO_7",
	[63]="UART_CTS_A",
	[263]="FEC_D_VALID_C",
	[241]="FEC_D5_OUT",
	[216]="MP2_PLL",
	[70]="UART_CTS_B",
	[76]="UART_CTS_C",
	[149]="TCON_VCOM_B",
	[41]="SD_D0_A",
	[178]="SD_D0_B",
	[142]="TCON_OEV1_B",
	[79]="I2C_SDA_slave",
	[46]="SDXC_D2_A",
	[4]="D0",
	[227]="FEC_SOP_OUT",
	[183]="SDXC_D2_B",
	[89]="SD_D0_C",
	[5]="D1",
	[97]="SDXC_D2_C",
	[6]="D2",
	[247]="FEC_D0_A",
	[232]="LCD_B0",
	[7]="D3",
	[234]="LCD_B1",
	[190]="FEC_D0_B",
	[145]="TCON_CPH1",
	[47]="SD_D3_A",
	[8]="D4",
	[254]="FEC_D0_C",
	[236]="LCD_B2",
	[184]="SD_D3_B",
	[160]="TCON_2_A",
	[146]="TCON_CPH2",
	[51]="SDXC_D5_A",
	[9]="D5",
	[238]="LCD_B3",
	[147]="TCON_CPH3",
	[137]="TCON_2_B",
	[99]="SD_D3_C",
	[10]="D6",
	[240]="LCD_B4",
	[233]="FEC_D1_OUT",
	[104]="SDXC_D5_C",
	[11]="D7",
	[253]="FEC_D3_A",
	[242]="LCD_B5",
	[244]="LCD_B6",
	[204]="VID_PLL",
	[196]="FEC_D3_B",
	[246]="LCD_B7",
	[166]="TCON_5_A",
	[143]="TCON_5_B",
	[296]="ENC_10",
	[262]="FEC_D6_A",
	[298]="ENC_11",
	[205]="FEC_D6_B",
	[126]="NAND_REn_WR",
	[300]="ENC_12",
	[307]="LCDin_DE",
	[302]="ENC_13",
	[301]="LCDin_CLK",
	[132]="LED_BL_PWM",
	[128]="SPI_NOR_CS_n_A",
	[39]="RMII_MDIO",
	[304]="ENC_14",
	[27]="RMII_TX_CLK",
	[306]="ENC_15",
	[150]="ENC_16",
	[310]="UART_CTS",
	[172]="ENC_17",
	[165]="TCON_OEV1",
	[73]="ISO7816_DATA",
	[52]="PCM_IN",
	[0]="FIR",
	[201]="DDR_PLL",
	[125]="NAND_WEn_CLK",
	[83]="SPI_RDYn",
	[50]="PCM_OUT",
	[123]="NAND_CLE",
	[243]="FEC_D6_OUT",
	[222]="HDMI_CH0_TMDS",
	[56]="PCM_CLK",
	[159]="TCON_STV1",
	[16]="I2S_OUT_LR_CLK",
	[67]="I2S_IN_BLCK",
	[15]="I2S_IN_LR_CLK",
	[84]="SPI_SS0",
	[85]="SPI_SS1",
	[24]="SPDIF_OUT",
	[82]="SPI_SS2",
	[229]="FEC_CLK_OUT",
	[174]="HDMI_HPD_5V",
	[127]="NAND_DQS",
	[78]="I2C_SDA",
	[235]="FEC_D2_OUT",
	[42]="SDXC_D0_A",
	[179]="SDXC_D0_B",
	[110]="NAND_CE0",
	[90]="SDXC_D0_C",
	[111]="NAND_CE1",
	[155]="VGA_VS",
	[138]="TCON_OEH_B",
	[114]="NAND_CE2",
	[43]="SD_D1_A",
	[303]="LCDin_HS",
	[248]="LCDin_R0",
	[180]="SD_D1_B",
	[156]="TCON_0_A",
	[118]="NAND_CE3",
	[48]="SDXC_D3_A",
	[313]="UART_RTS",
	[250]="LCDin_R1",
	[185]="SDXC_D3_B",
	[133]="TCON_0_B",
	[92]="SD_D1_C",
	[268]="FEC_CLK_A",
	[252]="LCDin_R2",
	[100]="SDXC_D3_C",
	[62]="UART_RX_A",
	[255]="LCDin_R3",
	[249]="FEC_D1_A",
	[211]="FEC_CLK_B",
	[68]="UART_RX_B",
	[258]="LCDin_R4",
	[257]="FEC_CLK_C",
	[192]="FEC_D1_B",
	[75]="UART_RX_C",
	[69]="ISO7816_RESET",
	[270]="FEC_SOP_A",
	[261]="LCDin_R5",
	[162]="TCON_3_A",
	[130]="LCD_VGHL_PWM",
	[64]="UART_RTS_A",
	[53]="SDXC_D6_A",
	[2]="HS",
	[264]="LCDin_R6",
	[214]="FEC_SOP_B",
	[139]="TCON_3_B",
	[72]="UART_RTS_B",
	[267]="LCDin_R7",
	[260]="FEC_SOP_C",
	[106]="SDXC_D6_C",
	[77]="UART_RTS_C",
	[256]="FEC_D4_A",
	[60]="SDXC_CMD_A",
	[199]="FEC_D4_B",
	[189]="SDXC_CMD_B",
	[163]="TCON_CPV1",
	[122]="SPI_NOR_Q_A",
	[245]="FEC_D7_OUT",
	[169]="TCON_6_A",
	[161]="TCON_OEH",
	[113]="SDXC_CMD_C",
	[316]="I2C_SCK_SLAVE",
	[148]="TCON_6_B",
	[88]="SPI_MISO",
	[175]="HDMI_SDA_5V",
	[318]="REMOTE",
	[265]="FEC_D7_A",
	[208]="FEC_D7_B",
	[171]="SPDIF_out",
	[191]="LCD_R0",
	[87]="SPI_MOSI",
	[193]="LCD_R1",
	[195]="LCD_R2",
	[170]="TCON_VCOM",
	[40]="RMII_MDC",
	[197]="LCD_R3",
	[121]="NAND_ALE",
	[33]="RMII_RX_CLK",
	[19]="I2S_OUT_BCLK",
	[200]="LCD_R4",
	[203]="LCD_R5",
	[237]="FEC_D3_OUT",
	[210]="MP0_PLL",
	[206]="LCD_R6",
	[312]="I2C_CLK_SLAVE",
	[209]="LCD_R7",
	[269]="LCDin_G0",
	[271]="LCDin_G1",
	[219]="FCLK_DIV5",
	[176]="HDMI_SCL_5V",
	[1]="IDQ",
	[273]="LCDin_G2",
	[14]="I2S_IN_CH0",
	[275]="LCDin_G3",
	[124]="SPI_NOR_C_A",
	[277]="LCDin_G4",
	[311]="UART_TX_PMIC",
	[279]="LCDin_G5",
	[281]="LCDin_G6",
	[283]="LCDin_G7",
	[66]="ISO7816_DET",
	[59]="SD_CMD_A",
	[223]="FEC_FAIL_OUT",
	[188]="SD_CMD_B",
	[54]="PCM_FS",
	[25]="REF_CLK_IN",
	[112]="SD_CMD_C",
	[58]="SDXC_CLK_A",
	[187]="SDXC_CLK_B",
	[144]="TCON_CPH50_B",
	[167]="TCON_CPH50",
	[117]="SDXC_CLK_C",
	[12]="CLK",
	[140]="TCON_CPV1_B",
	[44]="SDXC_D1_A",
	[212]="LCD_G0",
	[181]="SDXC_D1_B",
	[315]="I2C_SDA_SLAVE",
	[215]="LCD_G1",
	[93]="SDXC_D1_C",
	[218]="LCD_G2",
	[32]="RMII_TX_DATA0",
	[221]="LCD_G3",
	[45]="SD_D2_A",
	[31]="RMII_TX_DATA1",
	[224]="LCD_G4",
	[182]="SD_D2_B",
	[158]="TCON_1_A",
	[49]="SDXC_D4_A",
	[30]="RMII_TX_DATA2",
	[226]="LCD_G5",
	[177]="HDMI_CEC",
	[136]="TCON_STV1_B",
	[135]="TCON_1_B",
	[96]="SD_D2_C",
	[13]="CLK_OUT",
	[29]="RMII_TX_DATA3",
	[228]="LCD_G6",
	[102]="SDXC_D4_C",
	[251]="FEC_D2_A",
	[230]="LCD_G7",
	[225]="FEC_D_VALID_OUT",
	[194]="FEC_D2_B",
	[134]="TCON_STH1_B",
	[305]="LCDin_VS",
	[164]="TCON_4_A",
	[55]="SDXC_D7_A",
	[239]="FEC_D4_OUT",
	[213]="MP1_PLL",
	[141]="TCON_4_B",
	[SIG_GPIOIN]="GPIOIN",
	[SIG_GPIOOUT]="GPIOOUT",
	[SIG_MAX_SIGS]=NULL
};
/* GPIO operation part */
static unsigned pad_gpio_bit[]={
	[PAD_GPIOD_6]=P_GPIO_OEN(2,22),
	[PAD_BOOT_4]=P_GPIO_OEN(3,4),
	[PAD_GPIOC_15]=P_GPIO_OEN(2,15),
	[PAD_GPIOE_11]=P_GPIO_OEN(6,11),
	[PAD_GPIOX_34]=P_GPIO_OEN(3,22),
	[PAD_GPIOD_8]=P_GPIO_OEN(2,24),
	[PAD_GPIOZ_0]=P_GPIO_OEN(6,16),
	[PAD_GPIOX_20]=P_GPIO_OEN(4,20),
	[PAD_GPIOB_4]=P_GPIO_OEN(1,4),
	[PAD_GPIOC_1]=P_GPIO_OEN(2,1),
	[PAD_GPIOZ_2]=P_GPIO_OEN(6,18),
	[PAD_GPIOX_22]=P_GPIO_OEN(4,22),
	[PAD_GPIOB_6]=P_GPIO_OEN(1,6),
	[PAD_GPIOY_7]=P_GPIO_OEN(5,7),
	[PAD_GPIOC_3]=P_GPIO_OEN(2,3),
	[PAD_GPIOZ_4]=P_GPIO_OEN(6,20),
	[PAD_GPIOX_24]=P_GPIO_OEN(4,24),
	[PAD_GPIOB_8]=P_GPIO_OEN(1,8),
	[PAD_GPIOY_9]=P_GPIO_OEN(5,9),
	[PAD_GPIOY_13]=P_GPIO_OEN(5,13),
	[PAD_GPIOA_20]=P_GPIO_OEN(0,20),
	[PAD_GPIOX_0]=P_GPIO_OEN(4,0),
	[PAD_GPIOA_18]=P_GPIO_OEN(0,18),
	[PAD_GPIOX_10]=P_GPIO_OEN(4,10),
	[PAD_GPIOY_15]=P_GPIO_OEN(5,15),
	[PAD_GPIOA_22]=P_GPIO_OEN(0,22),
	[PAD_CARD_1]=P_GPIO_OEN(5,24),
	[PAD_GPIOX_2]=P_GPIO_OEN(4,2),
	[PAD_GPIOA_1]=P_GPIO_OEN(0,1),
	[PAD_GPIOAO_7]=P_GPIO_OEN(7,7),
	[PAD_GPIOA_24]=P_GPIO_OEN(0,24),
	[PAD_GPIOA_3]=P_GPIO_OEN(0,3),
	[PAD_GPIOX_4]=P_GPIO_OEN(4,4),
	[PAD_BOOT_10]=P_GPIO_OEN(3,10),
	[PAD_GPIOAO_9]=P_GPIO_OEN(7,9),
	[PAD_GPIOB_13]=P_GPIO_OEN(1,13),
	[PAD_GPIOZ_10]=P_GPIO_OEN(6,26),
	[PAD_GPIOA_10]=P_GPIO_OEN(0,10),
	[PAD_BOOT_12]=P_GPIO_OEN(3,12),
	[PAD_BOOT_9]=P_GPIO_OEN(3,9),
	[PAD_GPIOB_15]=P_GPIO_OEN(1,15),
	[PAD_GPIOE_8]=P_GPIO_OEN(6,8),
	[PAD_GPIOZ_12]=P_GPIO_OEN(6,28),
	[PAD_BOOT_14]=P_GPIO_OEN(3,14),
	[PAD_GPIOB_17]=P_GPIO_OEN(1,17),
	[PAD_GPIOD_1]=P_GPIO_OEN(2,17),
	[PAD_GPIOC_10]=P_GPIO_OEN(2,10),
	[PAD_GPIOD_3]=P_GPIO_OEN(2,19),
	[PAD_GPIOX_31]=P_GPIO_OEN(4,31),
	[PAD_GPIOC_8]=P_GPIO_OEN(2,8),
	[PAD_GPIOZ_9]=P_GPIO_OEN(6,25),
	[PAD_GPIOD_5]=P_GPIO_OEN(2,21),
	[PAD_GPIOX_29]=P_GPIO_OEN(4,29),
	[PAD_GPIOE_10]=P_GPIO_OEN(6,10),
	[PAD_GPIOX_33]=P_GPIO_OEN(3,21),
	[PAD_GPIOX_35]=P_GPIO_OEN(3,23),
	[PAD_GPIOB_1]=P_GPIO_OEN(1,1),
	[PAD_GPIOY_2]=P_GPIO_OEN(5,2),
	[PAD_GPIOX_15]=P_GPIO_OEN(4,15),
	[PAD_CARD_6]=P_GPIO_OEN(5,29),
	[PAD_GPIOY_4]=P_GPIO_OEN(5,4),
	[PAD_GPIOB_3]=P_GPIO_OEN(1,3),
	[PAD_GPIOX_17]=P_GPIO_OEN(4,17),
	[PAD_GPIOZ_1]=P_GPIO_OEN(6,17),
	[PAD_GPIOX_21]=P_GPIO_OEN(4,21),
	[PAD_CARD_8]=P_GPIO_OEN(5,31),
	[PAD_GPIOX_9]=P_GPIO_OEN(4,9),
	[PAD_GPIOA_8]=P_GPIO_OEN(0,8),
	[PAD_GPIOB_5]=P_GPIO_OEN(1,5),
	[PAD_GPIOY_6]=P_GPIO_OEN(5,6),
	[PAD_GPIOX_19]=P_GPIO_OEN(4,19),
	[PAD_GPIOY_10]=P_GPIO_OEN(5,10),
	[PAD_GPIOAO_11]=P_GPIO_OEN(7,11),
	[PAD_GPIOB_22]=P_GPIO_OEN(1,22),
	[PAD_GPIOY_8]=P_GPIO_OEN(5,8),
	[PAD_GPIOB_7]=P_GPIO_OEN(1,7),
	[PAD_GPIOA_15]=P_GPIO_OEN(0,15),
	[PAD_GPIOY_12]=P_GPIO_OEN(5,12),
	[PAD_GPIOA_17]=P_GPIO_OEN(0,17),
	[PAD_GPIOAO_4]=P_GPIO_OEN(7,4),
	[PAD_GPIOY_14]=P_GPIO_OEN(5,14),
	[PAD_GPIOA_21]=P_GPIO_OEN(0,21),
	[PAD_GPIOA_0]=P_GPIO_OEN(0,0),
	[PAD_GPIOX_1]=P_GPIO_OEN(4,1),
	[PAD_GPIOA_19]=P_GPIO_OEN(0,19),
	[PAD_GPIOAO_6]=P_GPIO_OEN(7,6),
	[PAD_GPIOB_10]=P_GPIO_OEN(1,10),
	[PAD_GPIOE_3]=P_GPIO_OEN(6,3),
	[PAD_GPIOAO_8]=P_GPIO_OEN(7,8),
	[PAD_BOOT_6]=P_GPIO_OEN(3,6),
	[PAD_GPIOB_12]=P_GPIO_OEN(1,12),
	[PAD_GPIOE_5]=P_GPIO_OEN(6,5),
	[PAD_BOOT_8]=P_GPIO_OEN(3,8),
	[PAD_GPIOB_14]=P_GPIO_OEN(1,14),
	[PAD_GPIOE_7]=P_GPIO_OEN(6,7),
	[PAD_GPIOE_9]=P_GPIO_OEN(6,9),
	[PAD_GPIOD_0]=P_GPIO_OEN(2,16),
	[PAD_GPIOC_5]=P_GPIO_OEN(2,5),
	[PAD_GPIOZ_6]=P_GPIO_OEN(6,22),
	[PAD_GPIOD_2]=P_GPIO_OEN(2,18),
	[PAD_GPIOX_26]=P_GPIO_OEN(4,26),
	[PAD_GPIOX_30]=P_GPIO_OEN(4,30),
	[PAD_GPIOC_7]=P_GPIO_OEN(2,7),
	[PAD_GPIOZ_8]=P_GPIO_OEN(6,24),
	[PAD_GPIOX_28]=P_GPIO_OEN(4,28),
	[PAD_GPIOX_32]=P_GPIO_OEN(3,20),
	[PAD_GPIOC_9]=P_GPIO_OEN(2,9),
	[PAD_GPIOX_12]=P_GPIO_OEN(4,12),
	[PAD_CARD_3]=P_GPIO_OEN(5,26),
	[PAD_GPIOY_1]=P_GPIO_OEN(5,1),
	[PAD_GPIOB_0]=P_GPIO_OEN(1,0),
	[PAD_GPIOX_14]=P_GPIO_OEN(4,14),
	[PAD_GPIOA_26]=P_GPIO_OEN(0,26),
	[PAD_CARD_5]=P_GPIO_OEN(5,28),
	[PAD_GPIOX_6]=P_GPIO_OEN(4,6),
	[PAD_GPIOA_5]=P_GPIO_OEN(0,5),
	[PAD_GPIOB_2]=P_GPIO_OEN(1,2),
	[PAD_GPIOY_3]=P_GPIO_OEN(5,3),
	[PAD_GPIOX_16]=P_GPIO_OEN(4,16),
	[PAD_CARD_7]=P_GPIO_OEN(5,30),
	[PAD_GPIOA_7]=P_GPIO_OEN(0,7),
	[PAD_GPIOX_8]=P_GPIO_OEN(4,8),
	[PAD_GPIOA_12]=P_GPIO_OEN(0,12),
	[PAD_GPIOY_5]=P_GPIO_OEN(5,5),
	[PAD_GPIOX_18]=P_GPIO_OEN(4,18),
	[PAD_GPIOAO_10]=P_GPIO_OEN(7,10),
	[PAD_GPIOB_21]=P_GPIO_OEN(1,21),
	[PAD_GPIOA_9]=P_GPIO_OEN(0,9),
	[PAD_GPIOA_14]=P_GPIO_OEN(0,14),
	[PAD_BOOT_16]=P_GPIO_OEN(3,16),
	[PAD_GPIOAO_1]=P_GPIO_OEN(7,1),
	[PAD_GPIOB_19]=P_GPIO_OEN(1,19),
	[PAD_GPIOY_11]=P_GPIO_OEN(5,11),
	[PAD_GPIOB_23]=P_GPIO_OEN(1,23),
	[PAD_GPIOA_16]=P_GPIO_OEN(0,16),
	[PAD_BOOT_1]=P_GPIO_OEN(3,1),
	[PAD_GPIOAO_3]=P_GPIO_OEN(7,3),
	[PAD_GPIOE_0]=P_GPIO_OEN(6,0),
	[PAD_GPIOC_12]=P_GPIO_OEN(2,12),
	[PAD_GPIOAO_5]=P_GPIO_OEN(7,5),
	[PAD_BOOT_3]=P_GPIO_OEN(3,3),
	[PAD_GPIOE_2]=P_GPIO_OEN(6,2),
	[PAD_GPIOC_14]=P_GPIO_IN(2,14),
	[PAD_GPIOD_7]=P_GPIO_OEN(2,23),
	[PAD_BOOT_5]=P_GPIO_OEN(3,5),
	[PAD_GPIOB_11]=P_GPIO_OEN(1,11),
	[PAD_GPIOE_4]=P_GPIO_OEN(6,4),
	[PAD_GPIOD_9]=P_GPIO_OEN(2,25),
	[PAD_BOOT_7]=P_GPIO_OEN(3,7),
	[PAD_GPIOE_6]=P_GPIO_OEN(6,6),
	[PAD_GPIOC_0]=P_GPIO_OEN(2,0),
	[PAD_GPIOZ_3]=P_GPIO_OEN(6,19),
	[PAD_GPIOC_2]=P_GPIO_OEN(2,2),
	[PAD_GPIOX_23]=P_GPIO_OEN(4,23),
	[PAD_GPIOC_4]=P_GPIO_OEN(2,4),
	[PAD_GPIOZ_5]=P_GPIO_OEN(6,21),
	[PAD_GPIOX_25]=P_GPIO_OEN(4,25),
	[PAD_GPIOB_9]=P_GPIO_OEN(1,9),
	[PAD_GPIOZ_7]=P_GPIO_OEN(6,23),
	[PAD_GPIOC_6]=P_GPIO_OEN(2,6),
	[PAD_GPIOX_27]=P_GPIO_OEN(4,27),
	[PAD_CARD_0]=P_GPIO_OEN(5,23),
	[PAD_GPIOX_11]=P_GPIO_OEN(4,11),
	[PAD_GPIOA_23]=P_GPIO_OEN(0,23),
	[PAD_CARD_2]=P_GPIO_OEN(5,25),
	[PAD_GPIOA_2]=P_GPIO_OEN(0,2),
	[PAD_GPIOX_3]=P_GPIO_OEN(4,3),
	[PAD_GPIOY_0]=P_GPIO_OEN(5,0),
	[PAD_GPIOX_13]=P_GPIO_OEN(4,13),
	[PAD_GPIOA_25]=P_GPIO_OEN(0,25),
	[PAD_CARD_4]=P_GPIO_OEN(5,27),
	[PAD_GPIOA_4]=P_GPIO_OEN(0,4),
	[PAD_GPIOX_5]=P_GPIO_OEN(4,5),
	[PAD_BOOT_11]=P_GPIO_OEN(3,11),
	[PAD_GPIOA_27]=P_GPIO_OEN(0,27),
	[PAD_GPIOZ_11]=P_GPIO_OEN(6,27),
	[PAD_GPIOA_6]=P_GPIO_OEN(0,6),
	[PAD_GPIOX_7]=P_GPIO_OEN(4,7),
	[PAD_GPIOA_11]=P_GPIO_OEN(0,11),
	[PAD_BOOT_13]=P_GPIO_OEN(3,13),
	[PAD_GPIOB_16]=P_GPIO_OEN(1,16),
	[PAD_GPIOB_20]=P_GPIO_OEN(1,20),
	[PAD_GPIOA_13]=P_GPIO_OEN(0,13),
	[PAD_BOOT_15]=P_GPIO_OEN(3,15),
	[PAD_GPIOAO_0]=P_GPIO_OEN(7,0),
	[PAD_GPIOB_18]=P_GPIO_OEN(1,18),
	[PAD_BOOT_17]=P_GPIO_OEN(3,17),
	[PAD_BOOT_0]=P_GPIO_OEN(3,0),
	[PAD_GPIOAO_2]=P_GPIO_OEN(7,2),
	[PAD_GPIOC_11]=P_GPIO_OEN(2,11),
	[PAD_GPIOD_4]=P_GPIO_OEN(2,20),
	[PAD_BOOT_2]=P_GPIO_OEN(3,2),
	[PAD_GPIOE_1]=P_GPIO_OEN(6,1),
	[PAD_GPIOC_13]=P_GPIO_OEN(2,13)
};
